Electronic
design automation (EDA) and software development tools take a
central role in the PASTA project. Much of our research is dedicated
to the investigation of smart
ASIP design flows integrating
automated instruction set extension and
graph-based resource sharing,
statistical performance estimation methodology,
fast instruction set simulation,
and customisable compiler technology for
code generation for complex instruction patterns and
dual memory bank support.
To support our research we have developed a number of software tools accompanying our
EnCore processor. Among our tools are:
- an energy-aware compiler (ECC) based on the commercial CoSy compiler development framework,
- a GCC compiler (version 4.2.1) derived from the official ARC port targeting EnCore and its automatically generated multiple-input/multiple-output (MIMO) instruction set extensions,
- a flexible and extensible high-speed simulator of the EnCore platform, and
- a co-simulation suite supporting verification and low-level debugging of our EnCore processor.