School of Informatics - University of Edinburgh Institute for Computing Systems Architecture - School of Informatics
Institute for Computing
Systems Architecture
EnCore Processor - Codename Calton

In the PASTA project we seek to automate the design and optimisation of customisable embedded processors. We do this by creating tools that are able to learn about the physical characteristics of the underlying silicon technology, and use that knowledge to synthesise the structure of an embedded processor. As the processor is now a flexible entity without a pre-defined instruction set, the compiler for that processor must be automatically extended or generated. Furthermore, the code optimisations that the compiler performs when translating from source code to the synthetic architecture, must also be synthesised.

The three main areas for automated synthesis are:

PASTA members from left to right - Igor Böhm, Freddie Qu, Richard Bennett, Oscar Almer, Nigel Topham, Mike Williams, Björn Franke, Alastair Murray, Georgios Tournavitis, Marcela Zuluaga

However, the information on which to make automated decisions in each case will be different. At the micro-architecture level we need to know how each micro-architecture option translates into speed, energy and die area. At the architectural level we need to know how each instruction set option translates into clock cycles of execution time, and at the compiler level we need to know how each optimisation reduces the overall number of instructions executed, and maximises the effectiveness of the memory system.

The challenge of our research is that all three areas are inter-dependent, and ultimately depend on the characteristics of the silicon on which the system is based. By blurring the boundary between hardware and software, and by automating the process of adjusting that boundary, we hope to create a system that can perform design trade-offs in seconds when currently it takes an experienced designer several days.

Overview

The PASTA project began in September 2006, funded by a research grant from EPSRC. Since then the group has grown to team of 10 researchers, addressing a range of research topics in architecture and compiler synthesis. On these project web pages you can find out about the research areas we are investigating, obtain copies or links to papers we have published, and learn about the software tools and hardware systems we have developed in order to carry out our research.

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