School of Informatics - University of Edinburgh Institute for Computing Systems Architecture - School of Informatics
Institute for Computing
Systems Architecture

Cooperative Partitioning: Energy-Efficient Cache Partitioning for High-Performance CMPs

    Paper - Cooperative Partitioning: Energy-Efficient Cache Partitioning for High-Performance CMPs
  • Type: Paper
  • Authors:
    K.Sundararajan, V.Porpodas, T.Jones, N.Topham and B.Franke.
  • Proceedings of the 18th International Symposium on High Performance Computer Architecture (HPCA'12), New Orleans, US, February 25-29, 2012.
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  • Abstract:

    Intelligently partitioning the last-level cache within a chip multiprocessor can bring significant performance improvements. Resources are given to the applications that can benefit most from them, restricting each core to a number of logical cache ways. However, although overall performance is increased, existing schemes fail to consider energy saving when making their partitioning decisions. This paper presents Cooperative Partitioning, a runtime partitioning scheme that reduces both dynamic and static energy while maintaining high performance. It works by enforcing cached data to be way-aligned, so that a way is owned by a single core at any time. Cores cooperate with each other to migrate ways between themselves after partitioning decisions have been made. Upon access to the cache, a core needs only to consult the ways that it owns to find its data, saving dynamic energy. Unused ways can be power-gated for static energy saving. We evaluate our approach on two-core and four-core systems, showing that we obtain average dynamic energy savings of 35% and static energy savings of 25% compared to a fixed partitioning scheme. In addition, Cooperative Partitioning maintains high performance while transferring ways five times faster than an existing state-of-the-art technique.