Michael O'Boyle is the MilePost Project Leader. He is a Professor in the School of Informatics at the University of Edinburgh and an EPSRC Advanced Research Fellow. He received his PhD in Computer Science from the University of Manchester in 1992. He was formerly a SERC Postdoctoral Research Fellow, a Visiting Research Scientist at IRISA/INRIA Rennes, a Visiting Research Fellow at the University of Vienna and a Visiting Scholar at Stanford University. More recently he was a Visiting Professor at UPC, Barcelona. Mike's main research interests are in adaptive compilation, formal program transformation representations, the compiler impact on embedded systems, compiler directed low power optimisation and automatic compilation for parallel single-address space architectures. He has published over 50 papers in international journals and conferences in this area and manages the Compiler and Architecture Design group consisting of 18 members. Homepage: http://www.dcs.ed.ac.uk/home/mob

Hugh Leather
Hugh is a PhD student, supervised by Mike O'Boyle. He graduated from Edinburgh in Computer Science a few years back and has since worked for Microsoft as a developer, for Trilogy as a dev lead and for the Specknet group as a research assistant. His research interests are in expanding the boundaries of machine learning in compiler technology.

Francois Bodin received a PhD degree in computer science at University of Rennes I (France) in 1989. In 1990, he spent a year as a post doctoral student at the University of Indiana in Pr. Gannon's team. He is currently Professor at IRISA (Institut de Recherche en Informatique et Systemes Aleatoires). His research interests include code optimizations and compiler technologies for high performance computers and embedded systems. He has participated to numerous Esprit projects (BRA Apparc, LTR Oceans, R&D Fits, Medea+ Mesa). He founded the start-up company CAPS enterprise in 2002.

Bilha Mendelson is the manager of the Code Optimization and Quality Technologies department in the IBM Haifa Research Lab, Israel. Since joining IBM in 1990, she has been developing optimizations for the DSP compiler and other compilers. She received a B.Sc. and an M.Sc. in Computer Science from the Technion, Israel Institute of Technology, and a Ph.D. in Computer Engineering from the University of Massachusetts at Amherst. She also received an MBA from the Haifa University in Israel. She holds several patents primarily in the area of code optimization. Her areas of interest include code optimization algorithms, compiler technology, computer architecture, and performance improvement issues.

Grigori Fursin is a tenured research scientist in the Alchemy group at INRIA Saclay (France). He graduated from Moscow Institute of Physics and Technology (Russia) in 1999 and obtained his PhD in computer science from Edinburgh University (UK) in 2004. His current research interests include automating program optimization and architecture design space exploration based on statistical collective optimization and machine learning; developing self-tuning intelligent fault-tolerant adaptive systems based on run-time adaptation and parallelization; realistic performance evaluation and benchmarking. Homepage: http://fursin.net/research

Olivier Temam graduated from Ecole Centrale de Paris in France in 1990, and then obtained his PhD in computer science from the University of Rennes/INRIA in 1993. He was assistant professor at the University of Versailles from 1994 until 1999, and then was a professor at the University of Paris Sud until 2004. Currently, he holds a full-time research position at INRIA Futurs in Paris, as senior researcher, where he heads the Alchemy group. He also serves in the steering committee of the European HiPEAC network. He has co-authored more than 50 publications in international conferences (such as ISCA, MICRO, ASPLOS, CGO, PACT) and journals, and has served in numerous program committees. His current research interests include alternative program optimization approaches to static compilation, novel programming paradigms, processor architecture and architecture simulation.